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vishay siliconix dg444, dg445 document number: 70054 s11-0984-rev. g, 23-may-11 www.vishay.com 1 this document is subject to change without notice. the products described herein and this document ar e subject to specific disclaimers, set forth at www.vishay.com/doc?91000 quad spst cmos analog switches applications ? audio switching ? battery powered systems ? data acquisition ? sample-and-hold circuits ? telecommunication systems ? automatic test equipment ? single supply circuits ? hard disk drives description the dg444, dg445 monolithic quad analog switches are designed to provide high speed, low error switching of analog signals. the dg444 has a normally closed function. the dg445 has a normally open function. combining low power (22 nw, typ) with high speed (t on : 120 ns, typ.), the dg444, dg445 are ideally suited for upgrading dg211, dg212 sockets. charge injection has been minimized on the drain for use in sample-and-hold circuits. to achieve high-voltage ratings and superior switching performance, the dg444, dg445 are built on vishay siliconix?s high-voltage silicon- gate process. an epitaxial layer prevents latchup. each switch conducts equally well in both directions when on, and blocks input vo ltages to the supply levels when off. features ? low on-resistance: 50 ? ? low leakage: 80 pa ? low power consumption: 22 nw ? fast switching action - t on : 120 ns ? low charge injection ? dg211, dg212 upgrades ? ttl/cmos logic compatible benefits ? low signal errors and distortion ? reduced power supply requirements ? faster throughput ? improved reliability ? reduced pedestal errors ? simple interfacing functional block diagram and pin configuration logic "0" ?? 0.8 v logic "1" ?? 2.4 v dual-in-line and soic in 1 in 2 d 1 d 2 s 1 s 2 v- v+ gnd v l s 4 s 3 d 4 d 3 in 4 in 3 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 top view 9 dg444 truth table logic dg444 dg445 0 on off 1offon ordering information temp. range package part number - 40 c to 85 c 16-pin plastic dip dg444dj DG445DJ 16-pin narrow soic dg444dy dg445dy
www.vishay.com 2 document number: 70054 s11-0984-rev. g, 23-may-11 vishay siliconix dg444, dg445 this document is subject to change without notice. the products described herein and this document ar e subject to specific disclaimers, set forth at www.vishay.com/doc?91000 notes: a. signals on s x , d x , or in x exceeding v+ or v- will be clamped by internal diodes . limit forward diode current to maximum current ratings. b. all leads welded or soldered to pc board. c. derate 6 mw/c above 75c. d. derate 8 mw/c above 75c. absolute maximum ratings (t a = 25 c, unless otherwise noted) parameter limit unit v+ to v- 44 v gnd to v- 25 v l (gnd - 0.3) to (v+) + 0.3 digital inputs a , v s , v d (v-) - 2 to (v+) + 2 or 30 ma, whichever occurs first continuous current (any terminal) 30 ma current, s or d (pulsed at 1 ms, 10 % duty cycle ) 100 storage temperature - 65 to 125 c power dissipation (package) b 16-pin plastic dip c 450 mw 16-pin narrow body soic d 640 specifications for dual supplies parameter symbol test conditions unless otherwise specified v+ = 15 v, v- = - 15 v v l = 5 v, v in = 2.4 v, 0.8 v e temp. a d suffix - 40 c c to 85 c unit min. b typ. c max. b analog switch analog signal range d v analog full - 15 15 v drain-source on-resistance r ds(on) i s = - 10 ma, v d = 8.5 v v+ = 13.5 v v- = - 13.5 v room full 50 85 100 ? switch off leakage current i s(off) v+ = 16.5, v- = - 16.5 v v d = 15.5 v, v s = 15.5 v room full - 0.5 - 5 0.01 0.5 5 na i d(off) room full - 0.5 - 5 0.01 0.5 5 channel on leakage current i d(on) v+ = 16.5 v, v- = - 16.5 v v s = v d = 15.5 v room full - 0.5 - 10 0.08 0.5 10 digital control input current v in low i il v in under test = 0.8 v all other = 2.4 v full - 500 - 0.01 500 na input current v in high i ih v in under test = 2.4 v all other = 0.8 v full - 500 0.01 500 dynamic characteristics tu r n - o n t i m e t on r l = 1 k ? , c l = 35 pf v s = 10 v, see figure 2 room 120 250 ns turn-off time t off dg444 room 110 140 dg445 room 160 210 charge injection e q c l = 1 nf, v s = 0 v v gen = 0 v, r gen = 0 ? room - 1 pc off isolation e oirr r l = 50 ? , c l = 5 pf, f =1 mhz room 60 db crosstalk (channel-to-channel) d x ta l k room 100 source off capacitance c s(off) f = 1 mhz room 4pf drain off capacitance c d(off) room 4 channel on capacitance c d(on) v analog = 0 v room 16
document number: 70054 s11-0984-rev. g, 23-may-11 www.vishay.com 3 vishay siliconix dg444, dg445 this document is subject to change without notice. the products described herein and this document ar e subject to specific disclaimers, set forth at www.vishay.com/doc?91000 notes: a. room = 25 c, full = as determined by the operating temperature suffix. b. the algebraic convention whereby the most negative value is a minimum and the most pos itive a maximum, is used in this datas heet. c. typical values are for design aid only, not guaranteed nor subject to production testing. d. guaranteed by design, no t subject to production test. e. v in = input voltage to perform proper function. stresses beyond those listed under ?absolute maximum ratings? may cause permanent damage to the device. these are stress rating s only, and functional operation of the device at these or any other conditions beyond those indi cated in the operational sections of the specifications is not implied. exposure to absolute maximum rating conditions for extended per iods may affect device reliability. specifications for dual supplies parameter symbol test conditions unless otherwise specified v+ = 15 v, v- = - 15 v v l = 5 v, v in = 2.4 v, 0.8 v e temp. a d suffix - 40 c c to 85 c unit min. b typ. c max. b power supplies positive supply current i+ v+ = 16.5 v, v- = - 16.5 v v in = 0 or 5 v room full 0.001 1 5 a negative supply current i- room full - 1 - 5 - 0.0001 logic supply current i l room full 0.001 1 5 ground current i gnd room full - 1 - 5 - 0.001 specifications for unipolar supplies parameter symbol test conditions unless otherwise specified v+ = 12 v, v- = 0 v v l = 5 v, v in = 2.4 v, 0.8 v e temp. a limits - 40 c c to 85 c unit min. b typ. c max. b analog switch analog signal range d v analog full 0 12 v drain-source on-resistance d r ds(on) i s = - 10 ma, v d = 3 v, 8 v v+ = 10.8 v, v l = 5.25 v room full 100 160 200 ? dynamic characteristics tu r n - o n t i m e t on r l = 1 k ? , c l = 35 pf, v s = 8 v see figure 2 room 300 450 ns turn-off time t off room 60 200 charge injection q c l = 1 nf, v gen = 6 v, r gen = 0 ? room 2 pc power supplies positive supply current i+ v+ = 13.2 v, v in = 0 or 5 v room full 0.001 1 5 a negative supply current i- v in = 0 or 5 v room full - 1 - 5 - 0.0001 logic supply current i l v l = 5.25 v, v in = 0 or 5 v room full 0.001 1 5 ground current i gnd v in = 0 or 5 v full - 1 - 5 - 0.001
www.vishay.com 4 document number: 70054 s11-0984-rev. g, 23-may-11 vishay siliconix dg444, dg445 this document is subject to change without notice. the products described herein and this document ar e subject to specific disclaimers, set forth at www.vishay.com/doc?91000 typical characteristics (t a = 25 c, unless otherwise noted) r ds(on) vs. v d and temperature charge injection vs. source voltage source/drain leakage currents r ds(on) - drain-source on-resistance ( ? ) v d - drain voltage (v) 15 0 - 15 0 20 50 30 70 80 40 60 10 25 c 85 c - 40 c 0 c v+ = 15 v v- = - 15 v - 10 - 5 5 1 0 q (pc) v s - source voltage (v) 10 0 - 10 - 30 - 10 20 0 40 50 10 30 - 20 - 5 5 c l = 1 nf v+ = 15 v v- = - 15 v v+ = 12 v v- = 0 v (pa) i , i sd v d or v s - drain or source voltage (v) 15 0 - 15 - 100 - 80 - 40 - 20 - 60 0 20 - 10 - 5 5 1 0 i s( of f) , i d(of f) i d(on) v+ = 15 v v- = - 15 v for i (of f ) , v d = - v s crosstak and off isolation vs. frequency switching threshold vs. supply voltage source/drain leakage currents (single 12-v supply) (db) f - frequency (hz) 0 - 20 - 40 - 80 - 100 - 60 - 120 - 140 v+ = 15 v v- = - 15 v ref. 10 dbm of f isolation crosstalk 1k 10k 100k 1m 10m 100 (v) th v v supply (v) 048121620 0 3 2 1 4 v l = 7 v v l = 5 v (pa) i , i sd v d or v s - drain or source voltage (v) 12 6 0 - 40 - 30 - 10 - 20 0 10 v+ = 12 v v- = 0 v for i d , v s = 0 v for i s , v d = 0 v i s( of f) , i d(of f) i s(on) + i d(on) 24 8 1 0
document number: 70054 s11-0984-rev. g, 23-may-11 www.vishay.com 5 vishay siliconix dg444, dg445 this document is subject to change without notice. the products described herein and this document ar e subject to specific disclaimers, set forth at www.vishay.com/doc?91000 typical characteristics (t a = 25 c, unless otherwise noted) switching time vs. power supply voltage supply current vs. temperature v - suppl y (v) t (ns) 10 12 14 16 18 20 22 160 140 120 20 80 60 40 100 t off t on t off t on dg444 dg445 , i-, i+, i i l gnd temperature (c) 100 ma 100 na 100 50 0 - 55 125 i+, i gnd -(i-) i l 10 ma 1 ma 10 na 1 na - 25 25 75 100 pa 10 pa 1 pa switching times vs. power supply voltage source/drain capacitance vs. analog voltage v+ - positive supply (v) t (ns) 500 400 0 8 22 200 100 300 10 12 14 16 18 20 t on t off t on v- = 0 v v l = 5 v t off dg444 dg445 v analo g - analog voltage (v) (pf) c s , d 15 0 - 15 0 5 15 10 20 25 - 10 - 5 5 1 0 v+ = 15 v v- = - 15 v c s( of f) , c d(of f) c s(on) + c d(on) switching time vs. input voltage input voltage (v) t (ns) 160 140 120 20 100 80 60 40 v+ = 15 v v- = - 15 v t on t on t off dg444 dg445 2 34 5
www.vishay.com 6 document number: 70054 s11-0984-rev. g, 23-may-11 vishay siliconix dg444, dg445 this document is subject to change without notice. the products described herein and this document ar e subject to specific disclaimers, set forth at www.vishay.com/doc?91000 schematic diagram typical channel test circuits figure 1. level shift/ drive v in v l s v+ gnd v- d v- v+ figure 2. switching time 0 v logic input switch input switch output 3 v 50 % 0 v v o v s t r < 20 ns t f < 20 ns t off t on note: logic input waveform is inverted for dg445. 50 % 80 % 80 % 10 v c l (includes fixture and stray capacitance) v- v l in s d 3 v r l 1 k ? c l 35 pf v o - 15 v gnd + 5 v v+ + 15 v figure 3. charge injection off on off off on off v o ? v o in x in x q = ? v o x c l (dg444) (dg445) c l 1 nf in d v o v- v+ s 3 v v g r g - 15 v gnd + 15 v v l + 5 v
document number: 70054 s11-0984-rev. g, 23-may-11 www.vishay.com 7 vishay siliconix dg444, dg445 this document is subject to change without notice. the products described herein and this document ar e subject to specific disclaimers, set forth at www.vishay.com/doc?91000 test circuits applications figure 4. crosstalk c = 1 mf tantalum in parallel with 0.01 mf ceramic 50 ? d 1 v o r g = 50 ? s 1 + 15 v - 15 v d 2 gnd v+ v- nc c c s 2 r l in 1 x ta l k isolation = 20 log v s v o 0 v, 2.4 v 0 v, 2.4 v v s in 2 c = rf bypass v l + 5 v figure 5. off isolation s in r l d r g = 50 ? v s v o 0 v, 2.4 v off isolation = 20 log v s v o v+ - 15 v gnd v- c + 15 v c + 5 v v l figure 6. source/drain capacitances s d f = 1 mhz in - 15 v gnd v- c 0 v, 2.4 v meter hp4192a impedance analyzer or equivalent v+ + 15 v c + 5 v v l figure 7. level shifter + 15 v + 15 v + 15 v + 5 v 0 v 0 v + 5 v v+ v- gnd v in 10 k ? v l v out 1 / 4 dg444
www.vishay.com 8 document number: 70054 s11-0984-rev. g, 23-may-11 vishay siliconix dg444, dg445 this document is subject to change without notice. the products described herein and this document ar e subject to specific disclaimers, set forth at www.vishay.com/doc?91000 applications vishay siliconix maintains worldwide manufacturing capability. products may be manufactured at one of several qualified locatio ns. reliability data for silicon technology and package reliability represent a composite of all qualified locations. for related documents such as package/tape drawings, part marking, and reliability data, see www.vishay.com/ppg?70054 . figure 8. precision-weighted resistor programmable-gain amplifier + 5 v - 15 v v- gnd dg444 or dg445 + - v in v out gain error is determined only by the resistor tolerance. op amp offset and cmrr will limit accuracy of circuit. gain 1 a v = 1 gain 2 a v = 10 gain 3 a v = 20 gain 4 a v = 100 r 1 90 k ? r 2 5 k ? r 3 4 k ? r 4 1 k ? v out v in = r 1 + r 2 + r 3 + r 4 r 4 = 100 with sw 4 closed: + 15 v v l v+ figure 9. precision sample-and-hold - 15 v + 15 v + 15 v - 15 v 30 pf gnd dg444 j202 j500 j507 + 15 v 2n4400 + - logic input low = sample high = hold r 1 200 k ? c 2 1000 pf c 1 50 pf v in v out v 1 5 m 5.1 m ? v 2 + 5 v
all leads 0.101 mm 0.004 in e h c d e b a1 l 4 3 12 8 7 56 13 14 16 15 9 10 12 11 package information vishay siliconix document number: 71194 02-jul-01 www.vishay.com 1
jedec part number: ms-012 dim min max min max a 1.35 1.75 0.053 0.069 a 1 0.10 0.20 0.004 0.008 b 0.38 0.51 0.015 0.020 c 0.18 0.23 0.007 0.009 d 9.80 10.00 0.385 0.393 e 3.80 4.00 0.149 0.157 e 1.27 bsc 0.050 bsc h 5.80 6.20 0.228 0.244 l 0.50 0.93 0.020 0.037 0 8 0 8 ecn: s-03946?rev. f, 09-jul-01 dwg: 5300
e 1 e q 1 a l a 1 e 1 b b 1 s c e a d 15 max 12345678 16 15 14 13 12 11 10 9 package information vishay siliconix document number: 71261 06-jul-01 www.vishay.com 1

dim min max min max a 3.81 5.08 0.150 0.200 a 1 0.38 1.27 0.015 0.050 b 0.38 0.51 0.015 0.020 b 1 0.89 1.65 0.035 0.065 c 0.20 0.30 0.008 0.012 d 18.93 21.33 0.745 0.840 e 7.62 8.26 0.300 0.325 e 1 5.59 7.11 0.220 0.280 e 1 2.29 2.79 0.090 0.110 e a 7.37 7.87 0.290 0.310 l 2.79 3.81 0.110 0.150 q 1 1.27 2.03 0.050 0.080 s 0.38 1.52 .015 0.060 ecn: s-03946?rev. d, 09-jul-01 dwg: 5482
application note 826 vishay siliconix www.vishay.com document number: 72608 24 revision: 21-jan-08 application note recommended minimum pads for so-16 recommended minimum pads for so-16 0.246 (6.248) recommended mi nimum pads dimensions in inches/(mm) 0.152 (3.861) 0.047 (1.194) 0.028 (0.711) 0.050 (1.270) 0.022 (0.559) 0.372 (9.449) return to index return to index
legal disclaimer notice www.vishay.com vishay revision: 02-oct-12 1 document number: 91000 disclaimer all product, product specifications and data are subject to change without notice to improve reliability, function or design or otherwise. vishay intertechnology, inc., its affiliates, agents, and employee s, and all persons acting on it s or their behalf (collectivel y, vishay), disclaim any and all liability for any errors, inaccuracies or incompleteness contained in any datasheet or in any o ther disclosure relating to any product. vishay makes no warranty, repres entation or guarantee regarding the suitabilit y of the products for any particular purpose or the continuing production of any product. to the maximum extent permitted by applicable law, vi shay disclaims (i) any and all liability arising out of the application or use of any product, (ii) any and all liability, including without limitation specia l, consequential or incidental damages, and (iii) any and all i mplied warranties, including warra nties of fitness for particular purpose, non-infringement and merchantability. statements regarding the suitability of products for certain type s of applications are based on vishays knowledge of typical requirements that are often placed on vishay products in generic applications. such statements are not binding statements about the suitability of products for a particular application. it is the customers responsib ility to validate that a particu lar product with the properties descri bed in the product specification is suitable fo r use in a particular application. parameters provided in datasheets and/or specification s may vary in different applications an d performance may vary over time. all operating parameters, including typical pa rameters, must be validated for each customer application by the customers technical experts. product specifications do not expand or otherwise modify vish ays terms and condit ions of purchase, including but not limited to the warranty expressed therein. except as expressly indicate d in writing, vishay products are not designed for use in medical, life-saving, or life-sustaining applications or for any other application in which the failure of the vi shay product could result in personal injury or death. customers using or selling vishay products not expressly indicated for use in such applications do so at their own risk. pleas e contact authorized vishay personnel to ob tain written terms and conditions regarding products designed for such applications. no license, express or implied, by estoppel or otherwise, to any intellectual prope rty rights is granted by this document or by any conduct of vishay. product names and markings noted herein may be trad emarks of their respective owners. material category policy vishay intertechnology, inc. hereby certi fies that all its products that are id entified as rohs-compliant fulfill the definitions and restrictions defined under directive 2011/65/eu of the euro pean parliament and of the council of june 8, 2011 on the restriction of the use of certain hazardous substances in electrical and electronic equipment (eee) - recast, unless otherwis e specified as non-compliant. please note that some vishay documentation may still make reference to rohs directive 2002/95/ ec. we confirm that all the products identified as being compliant to directive 2002 /95/ec conform to directive 2011/65/eu. vishay intertechnology, inc. hereby certifi es that all its products that are identified as ha logen-free follow halogen-free requirements as per jedec js709a stan dards. please note that some vishay documentation may still make reference to the iec 61249-2-21 definition. we co nfirm that all the products identified as being compliant to iec 61249-2-21 conform to jedec js709a standards.

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